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<pre> | <pre> | ||
Programming docs for the Silversurfer serial port | Programming docs for the Silversurfer serial port | ||
This document is freely distributable as long as it is not changed, and one | This document is freely distributable as long as it is not changed, and one | ||
of the sources www.jschoenfeld.com, www.jschonfeld.de, www.siliconsonic.com | of the sources www.jschoenfeld.com, www.jschonfeld.de, www.siliconsonic.com | ||
is mentioned. | is mentioned. | ||
last update: March 1st, 2001 | last update: March 1st, 2001 | ||
The silversurfer serial port uses a 16c550 UART Chip by California | The silversurfer serial port uses a 16c550 UART Chip by California | ||
Microdevices (www.calmicro.com). The datasheet is not available on | Microdevices (www.calmicro.com). The datasheet is not available on | ||
the internet, if you are interested in timing details, contact me directly, | the internet, if you are interested in timing details, contact me directly, | ||
as Calmicro has discontinued the part, and is no longer supporting developers | as Calmicro has discontinued the part, and is no longer supporting developers | ||
with datasheets. The UART is compatible with the common 16c550 | with datasheets. The UART is compatible with the common 16c550 | ||
implementations, so you may not need the details. Just to be complete: | implementations, so you may not need the details. Just to be complete: | ||
The full part number is CM16C550PE. CM is Calmicro's prefix, and PE marks the | The full part number is CM16C550PE. CM is Calmicro's prefix, and PE marks the | ||
package (PLCC-44 in this case). | package (PLCC-44 in this case). | ||
There is somebody on the internet who claims to have developed the | There is somebody on the internet who claims to have developed the | ||
Silversurfer. He gives technical information without any background, and | Silversurfer. He gives technical information without any background, and | ||
claims that the datasheet is available on www.cmd.com. Please do not disturb | claims that the datasheet is available on www.cmd.com. Please do not disturb | ||
the guys from CMD, as this is a storage company, they never made chips like | the guys from CMD, as this is a storage company, they never made chips like | ||
the 16c550. This is just the proof that the guy is lying - he may do good | the 16c550. This is just the proof that the guy is lying - he may do good | ||
software, but nothing else. | software, but nothing else. | ||
The silversurfer is available in two versions. The basic version is meant for | The silversurfer is available in two versions. The basic version is meant for | ||
the clock-port of the A1200. The 16c550 has eight registers, and some | the clock-port of the A1200. The 16c550 has eight registers, and some | ||
multiplexed registers for the Baud Rate generator. The address space for the | multiplexed registers for the Baud Rate generator. The address space for the | ||
clock-port is 16 bytes, and the Silversurfer occupies all of them. The upper | clock-port is 16 bytes, and the Silversurfer occupies all of them. The upper | ||
eight registers are mirrors of the lower eight registers. In the following | eight registers are mirrors of the lower eight registers. In the following | ||
text, I will only talk about the lower eight addresses, but you must keep in | text, I will only talk about the lower eight addresses, but you must keep in | ||
mind that there may be a mirror. I'm using the term "may be" because you have | mind that there may be a mirror. I'm using the term "may be" because you have | ||
the possibiliy to disable one of the two blocks by closing a jumper (see | the possibiliy to disable one of the two blocks by closing a jumper (see | ||
further down). | further down). | ||
The second version is the "limited Edition", which has a different connector, | The second version is the "limited Edition", which has a different connector, | ||
and a different memory map when connected to the 26-pin expansion port. When | and a different memory map when connected to the 26-pin expansion port. When | ||
connected to the clock-port (with a cable!), the memory map is the same as | connected to the clock-port (with a cable!), the memory map is the same as | ||
with the standard version. | with the standard version. | ||
summary of registers: | summary of registers: | ||
(note: DLAB is short for Divisor Latch Access Bit, it's bit#7 in register#3) | (note: DLAB is short for Divisor Latch Access Bit, it's bit#7 in register#3) | ||
Number: 0 | Number: 0 | ||
Address in A1200: $d80001 | Address in A1200: $d80001 | ||
Address on Limited Edition: Board Offset + port offset + $18 | Address on Limited Edition: Board Offset + port offset + $18 | ||
With DLAB=0: | With DLAB=0: | ||
Reading reads the "receiver Buffer Register" | Reading reads the "receiver Buffer Register" | ||
Writing writes to the Transmitter holding register | Writing writes to the Transmitter holding register | ||
With DLAB=1: | With DLAB=1: | ||
Divisor Latch (lower significant byte) | Divisor Latch (lower significant byte) | ||
Number: 1 | Number: 1 | ||
Address in A1200: $d80005 | Address in A1200: $d80005 | ||
Address on Limited Edition: Board Offset + port offset + $1a | Address on Limited Edition: Board Offset + port offset + $1a | ||
With DLAB=0: | With DLAB=0: | ||
interrupt enable register | interrupt enable register | ||
With DLAB=1: | With DLAB=1: | ||
Divisor Latch (most significant byte) | Divisor Latch (most significant byte) | ||
The following registers are not affected by the DLAB bit: | The following registers are not affected by the DLAB bit: | ||
Number: 2 | Number: 2 | ||
Address in A1200: $d80009 | Address in A1200: $d80009 | ||
Address on Limited Edition: Board Offset + port offset + $1c | Address on Limited Edition: Board Offset + port offset + $1c | ||
read: Interrupt identification register | read: Interrupt identification register | ||
write: Fifo Control register | write: Fifo Control register | ||
Number: 3 | Number: 3 | ||
Address in A1200: $d8000d | Address in A1200: $d8000d | ||
Address on Limited Edition: Board Offset + port offset + $1e | Address on Limited Edition: Board Offset + port offset + $1e | ||
Line control register | Line control register | ||
Number: 4 | Number: 4 | ||
Address in A1200: $d80011 | Address in A1200: $d80011 | ||
Address on Limited Edition: Board Offset + port offset + $38 | Address on Limited Edition: Board Offset + port offset + $38 | ||
Modem control register | Modem control register | ||
Number: 5 | Number: 5 | ||
Address in A1200: $d80015 | Address in A1200: $d80015 | ||
Address on Limited Edition: Board Offset + port offset + $3a | Address on Limited Edition: Board Offset + port offset + $3a | ||
Line status register (read only) | Line status register (read only) | ||
Number: 6 | Number: 6 | ||
Address in A1200: $d80019 | Address in A1200: $d80019 | ||
Address on Limited Edition: Board Offset + port offset + $3c | Address on Limited Edition: Board Offset + port offset + $3c | ||
Modem status register | Modem status register | ||
Number: 7 | Number: 7 | ||
Address in A1200: $d8001d | Address in A1200: $d8001d | ||
Address on Limited Edition: Board Offset + port offset + $3e | Address on Limited Edition: Board Offset + port offset + $3e | ||
Scratch pad register | Scratch pad register | ||
------ | ------ | ||
With an IRQ enabled, the Silversurfer will issue an IRQ6, no matter where | With an IRQ enabled, the Silversurfer will issue an IRQ6, no matter where | ||
it is connected. There are no more registers than the chip registers. All | it is connected. There are no more registers than the chip registers. All | ||
you need is eight addresses. | you need is eight addresses. | ||
The Z4 zorro expansion for A1200 computers has four clock-ports. It | The Z4 zorro expansion for A1200 computers has four clock-ports. It | ||
is advisable to support them, as many people have bought the Silversurfer | is advisable to support them, as many people have bought the Silversurfer | ||
because of the compatibility to this extension: | because of the compatibility to this extension: | ||
Add $4000 to all clock-port registers to access a Silversurfer on | Add $4000 to all clock-port registers to access a Silversurfer on | ||
clock-port 1 of the Z4 board. | clock-port 1 of the Z4 board. | ||
Add $8000 to all clock-port registers to access a Silversurfer on | Add $8000 to all clock-port registers to access a Silversurfer on | ||
clock-port 2 of the Z4 board. | clock-port 2 of the Z4 board. | ||
Add $c000 to all clock-port registers to access a Silversurfer on | Add $c000 to all clock-port registers to access a Silversurfer on | ||
clock-port 3 of the Z4 board. | clock-port 3 of the Z4 board. | ||
Check for presence of the Z4 board by checking mirrors of the scratch pad | Check for presence of the Z4 board by checking mirrors of the scratch pad | ||
register. If you write to the scratch pad register at $d8001d and also find | register. If you write to the scratch pad register at $d8001d and also find | ||
that value at $d8401d, there can be no Z4 board. DO CROSS-CHECKS by writing | that value at $d8401d, there can be no Z4 board. DO CROSS-CHECKS by writing | ||
the scratch pad register in $d8401d and reading it back on $d8001d, as there | the scratch pad register in $d8401d and reading it back on $d8001d, as there | ||
can be trash in the scratch pad from the previous run of your (or other) | can be trash in the scratch pad from the previous run of your (or other) | ||
software. Writes should be done with different bit-patterns in order to | software. Writes should be done with different bit-patterns in order to | ||
minimize the possiblity of false identification. | minimize the possiblity of false identification. | ||
Silversurfer on other clock-ports: | Silversurfer on other clock-ports: | ||
The Buddha Flash also contains a clock-port. This port is located at even | The Buddha Flash also contains a clock-port. This port is located at even | ||
addresses, so substract $d80001 from the clock-port values and add the board | addresses, so substract $d80001 from the clock-port values and add the board | ||
offset plus the port offset. In other words, if the Buddha is located at | offset plus the port offset. In other words, if the Buddha is located at | ||
$ea0000, the eight registers are at: | $ea0000, the eight registers are at: | ||
$ea0e00 | $ea0e00 | ||
$ea0e04 | $ea0e04 | ||
$ea0e08 | $ea0e08 | ||
$ea0e0c | $ea0e0c | ||
$ea0e10 | $ea0e10 | ||
$ea0e14 | $ea0e14 | ||
$ea0e18 | $ea0e18 | ||
$ea0e1c | $ea0e1c | ||
Similar calculation with the X-Surf clock-ports. Mind that one of the | Similar calculation with the X-Surf clock-ports. Mind that one of the | ||
ports uses even addresses, and the other uses odd addresses. This has | ports uses even addresses, and the other uses odd addresses. This has | ||
been done in order to balance the load on the data lines a bit. While | been done in order to balance the load on the data lines a bit. While | ||
implementing software for other ports, also look at the Inside_ISDN.txt | implementing software for other ports, also look at the Inside_ISDN.txt | ||
file for the port location on the ISDN Surfer Zorro board. | file for the port location on the ISDN Surfer Zorro board. | ||
The UART is clocked at 7,372800 Mhz. The frequency may sound odd, but | The UART is clocked at 7,372800 Mhz. The frequency may sound odd, but | ||
it is perfect for generating the common baud rates. To operate properly, | it is perfect for generating the common baud rates. To operate properly, | ||
the Baud rate generator uses a 16x clock rate, so if you want to set 38400 | the Baud rate generator uses a 16x clock rate, so if you want to set 38400 | ||
baud, the Baud rate generator must be programmed to genberate a 614400 clock. | baud, the Baud rate generator must be programmed to genberate a 614400 clock. | ||
This is done by calculating 7372800/614400=12. Write this value to the | This is done by calculating 7372800/614400=12. Write this value to the | ||
Divisor Latch LSB, and a 0 to the Divisor Latch MSB, and you're done. | Divisor Latch LSB, and a 0 to the Divisor Latch MSB, and you're done. | ||
Solder-jumpers on the back of the silversurfer: | Solder-jumpers on the back of the silversurfer: | ||
There are six unused pads on the back of the board. Four of them are | There are six unused pads on the back of the board. Four of them are | ||
maent for pullup/pulldown resistors or noise reduction capacitors. This | maent for pullup/pulldown resistors or noise reduction capacitors. This | ||
relates to my experience with the non-working Hypercom 1 models, that could | relates to my experience with the non-working Hypercom 1 models, that could | ||
have been debugged with 33pF capacitors on IOR and IOW (unfortunately, | have been debugged with 33pF capacitors on IOR and IOW (unfortunately, | ||
somebody decided to use standard low-cost capacitors, so the bug still | somebody decided to use standard low-cost capacitors, so the bug still | ||
exists - it will not if you use X7R capacitors in SMD style!). The chip | exists - it will not if you use X7R capacitors in SMD style!). The chip | ||
used on the Silversurfer does not need this kind of debugging, it has a | used on the Silversurfer does not need this kind of debugging, it has a | ||
built-in input hysteresis, so noise is filtered on-chip. Just leave the | built-in input hysteresis, so noise is filtered on-chip. Just leave the | ||
four pads on the Silversurfer unused, and focus on the other two, which | four pads on the Silversurfer unused, and focus on the other two, which | ||
are more interesting: They are simple jumpers, either use a wire or a 0-ohm | are more interesting: They are simple jumpers, either use a wire or a 0-ohm | ||
resistor to close the jumpers. | resistor to close the jumpers. | ||
Never close both jumpers at the same time! | Never close both jumpers at the same time! | ||
location of the jumpers: | location of the jumpers: | ||
The diagram shows the silversurfer from the solder-side! | The diagram shows the silversurfer from the solder-side! | ||
--------------------------- | --------------------------- | ||
| clock-port | | | clock-port | | ||
| | | | | | ||
| | | | | | ||
| | | | | | ||
| | | | | | ||
------ ------- | ------ ------- | ||
| | | | | | ||
| 1# #3 | | | 1# #3 | | ||
| | | | | | ||
| 2# #4 | | | 2# #4 | | ||
| | | | | | ||
| | | | | | ||
| # #| | | # #| | ||
| | | | | | ||
| # # # #| | | # # # #| | ||
| | | | | | ||
| # # | | | # # | | ||
| | | | | | ||
| | | | | | ||
| | | | | | ||
| | | | | | ||
| | | | | | ||
| | | | | | ||
| | | | | | ||
| | | | | | ||
|## |--- | |## |--- | ||
|## |--- | |## |--- | ||
|## |--- serial connector | |## |--- serial connector | ||
|## |--- | |## |--- | ||
| |--- | | |--- | ||
---------------------------- | ---------------------------- | ||
Only use pads with numbers, leave the other pads (marked with #) unused!! | Only use pads with numbers, leave the other pads (marked with #) unused!! | ||
Usually, the CS2 signal (pin 16) of the UART is pulled high with a resistor | Usually, the CS2 signal (pin 16) of the UART is pulled high with a resistor | ||
that is located on the top of the silversurfer. Closing one of the jumpers | that is located on the top of the silversurfer. Closing one of the jumpers | ||
applies address line A5 to this pin, either inverted, or double-inverted | applies address line A5 to this pin, either inverted, or double-inverted | ||
(that is, directly). As a result, one of the register banks will be disabled: | (that is, directly). As a result, one of the register banks will be disabled: | ||
Connection 1-2 (R2) will disable the lower register bank | Connection 1-2 (R2) will disable the lower register bank | ||
This means, that the UART chip is only located at addresses $d80021 and up | This means, that the UART chip is only located at addresses $d80021 and up | ||
(Mirror on $d80001 and up is free, can be used for other hardware). | (Mirror on $d80001 and up is free, can be used for other hardware). | ||
Connection 3-4 (R4) will disable the upper register bank | Connection 3-4 (R4) will disable the upper register bank | ||
This means, that the UART chip is only located at addresses $d80001 and up | This means, that the UART chip is only located at addresses $d80001 and up | ||
(Mirror on $d80021 and up is free, can be used for other hardware). | (Mirror on $d80021 and up is free, can be used for other hardware). | ||
These solder-jumpers are also present on the limited edition of the | |||
Silversurfer. Only use them if you are using the clock-port connector, | |||
otherwise you will cause even more confusion with the registers of the | |||
26-pin connector. | |||
The other unused pads on the opposite side are meant for direct connection of | |||
a DB9-male connector. This has never been used, and will only fit if you | |||
use the Silversurfer on a Zorro board (or in a completely different | |||
enviroment). The orientation of the connector is obvious: Four pins on the | |||
solderside, five pins on the component side will speak for themselves. | |||
If you have any comments or want to have a hardcopy of the California | |||
Microdevices datasheet, send me an e-mail: jens@jschoenfeld.de | |||
---EOF | |||
</pre> | |||
<pre> | |||
This document is freely distributable as long as it is not changed, and one | |||
of the sources www.jschoenfeld.com, www.jschoenfeld.de, www.siliconsonic.com | |||
or www.ami.ga is mentioned. | |||
last update: | |||
august 31st, 2003: initial release | |||
General | |||
------- | |||
RR-Net is a 10MBit networking card that is designed for the commodore C64, | |||
for use on the Retro Replay freezer cartridge. It'll also work on the Amiga | |||
with a clock-port, but it is not recommended: The card does not support IRQs, | |||
and it hardly fits mechanically. If you need network for your Amiga, use the | |||
X-Surf 2 board. | |||
Memory map | |||
---------- | |||
The memory map depends on the place where RR-Net is connected. Although | |||
RR-Net is designed for the C64, here are also the offset addresses for the | |||
Amiga. Check the corresponding hardware documentations for the carrier cards | |||
to obtain the base addresses of the clockport. | |||
RR-Net is based on the Cirrus logic CS8900a (Crystal LAN). The chip is used | |||
in 8-bit mode, so the 8 registers of an NE2000 are spread over 16 registers | |||
in an 8-bit system. The 8-bit mode of the chip does not support IRQs (see | |||
Cirrus logic application note AN181). | |||
Do not forget to switch on the accessory connector of the Retro Replay by | |||
setting bit 0 in $de01. See Inside_Replay.txt for more information. | |||
C64 register Amiga register read/write meaning | |||
none $00/$04 read-only interrupt status queue | |||
$de02/$de03 $08/$0c read/write PackatPage pointer | |||
$de04/$de05 $10/$14 read/write PacketPage Data (Port 0) | |||
$de06/$de07 $18/$1c read/write PacketPage Data (Port 1) | |||
$de08/$de09 $20/$24 read/write Receive/Transmit Data (Port 0) | |||
$de0a/$de0b $28/$2c read/write Receive/Transmit Data (Port 1) | |||
$de0c/$de0d $30/$34 write-only TxCMD (Transmit Command) | |||
$de0e/$de0f $38/$3c write-only TxLength (Transmit Length) | |||
Although the Amiga makes the interrupt status queue registers available, it | |||
does not have any effect. Even if you try to activate the chip's IRQ features, | |||
it will not have any effect. The IRQ line of the chip is not wired on RR-Net | |||
at all! | |||
If you compare this register map to the register map in AN181, you might | |||
notice that the first and the second half of the register set is swapped. | |||
This has been done, because the accessory connector of the Retro Replay does | |||
not provide the full range of registers available on the Amiga clockport. The | |||
first two bytes are control registers of the freezer cartridge, and this | |||
swapping moves the unnecessary register-pair (IRQ status queue) into the | |||
"invisible" area of the cartridge. | |||
Endianess | |||
--------- | |||
Although the chip is used in 8-bit mode, you have to know the endianess, | |||
because each register pair forms a one 16-bit register. Ethernet is | |||
big-endian by default. The chip was designed as an ISA thing, so all | |||
registers appear as little endian. In other words: The lowbyte comes first, | |||
then the highbyte. | |||
MAC address | |||
----------- | |||
RR-Net does not have an EEprom to store the MAC address, so it should be | |||
stored somewhere else: The flash rom of Retro Replay, the disk of the | |||
Contiki operating system by Adam Dunkels (http://dunkels.com/adam/contiki/), | |||
or Kickflash OS4 for the Amiga. The Mac address is only needed when | |||
transmitting packets, so it's OK if it's loaded from mass storage media when | |||
loading/starting the driver. The Mac address is NOT needed when RR-Net is | |||
just connected to other networking equipment. The LINK led might already be | |||
on, but the MAC address is only needed when something is transmitted into the | |||
network. | |||
More literature | |||
--------------- | |||
Cirrus Logic Application note AN181: "Using the Crystal CS8900A in 8-bit | |||
mode" by James Ayres: http://www.cirrus.com/en/pubs/appNote/an181.pdf | |||
Crystal LAN CS8900A Ethernet Controller Technical Reference manual AN83: | |||
http://www.cirrus.com/en/pubs/appNote/An83-3.pdf | |||
The product data sheet for the CS8900A also contains software information, | |||
starting at chapter 4 (page 38): | |||
http://www.cirrus.com/en/pubs/proDatasheet/cs8900a-4.pdf | |||
Application note 194: "How to program the Hash filter in the CS8900A": | |||
http://www.cirrus.com/en/pubs/appNote/an194-1.pdf | |||
The FAQ about the chip: http://www.cirrus.com/en/pubs/appNote/an205-2.pdf | |||
Fine print | |||
---------- | |||
RR-Net is not designed, authorized or warranted to be suitable for use in | |||
life-support devices or systems or other critical operations. Inclusion of | |||
the product in such applications is understood to be fully at the | |||
customer's risk. | |||
** EOF | |||
</pre> | </pre> | ||
[[Category:RS-232 Interfaces]] | |||
[[Category:Retro_Replay_Hardware]] | [[Category:Retro_Replay_Hardware]] | ||
Latest revision as of 21:23, 15 June 2010
Programming docs for the Silversurfer serial port
This document is freely distributable as long as it is not changed, and one
of the sources www.jschoenfeld.com, www.jschonfeld.de, www.siliconsonic.com
is mentioned.
last update: March 1st, 2001
The silversurfer serial port uses a 16c550 UART Chip by California
Microdevices (www.calmicro.com). The datasheet is not available on
the internet, if you are interested in timing details, contact me directly,
as Calmicro has discontinued the part, and is no longer supporting developers
with datasheets. The UART is compatible with the common 16c550
implementations, so you may not need the details. Just to be complete:
The full part number is CM16C550PE. CM is Calmicro's prefix, and PE marks the
package (PLCC-44 in this case).
There is somebody on the internet who claims to have developed the
Silversurfer. He gives technical information without any background, and
claims that the datasheet is available on www.cmd.com. Please do not disturb
the guys from CMD, as this is a storage company, they never made chips like
the 16c550. This is just the proof that the guy is lying - he may do good
software, but nothing else.
The silversurfer is available in two versions. The basic version is meant for
the clock-port of the A1200. The 16c550 has eight registers, and some
multiplexed registers for the Baud Rate generator. The address space for the
clock-port is 16 bytes, and the Silversurfer occupies all of them. The upper
eight registers are mirrors of the lower eight registers. In the following
text, I will only talk about the lower eight addresses, but you must keep in
mind that there may be a mirror. I'm using the term "may be" because you have
the possibiliy to disable one of the two blocks by closing a jumper (see
further down).
The second version is the "limited Edition", which has a different connector,
and a different memory map when connected to the 26-pin expansion port. When
connected to the clock-port (with a cable!), the memory map is the same as
with the standard version.
summary of registers:
(note: DLAB is short for Divisor Latch Access Bit, it's bit#7 in register#3)
Number: 0
Address in A1200: $d80001
Address on Limited Edition: Board Offset + port offset + $18
With DLAB=0:
Reading reads the "receiver Buffer Register"
Writing writes to the Transmitter holding register
With DLAB=1:
Divisor Latch (lower significant byte)
Number: 1
Address in A1200: $d80005
Address on Limited Edition: Board Offset + port offset + $1a
With DLAB=0:
interrupt enable register
With DLAB=1:
Divisor Latch (most significant byte)
The following registers are not affected by the DLAB bit:
Number: 2
Address in A1200: $d80009
Address on Limited Edition: Board Offset + port offset + $1c
read: Interrupt identification register
write: Fifo Control register
Number: 3
Address in A1200: $d8000d
Address on Limited Edition: Board Offset + port offset + $1e
Line control register
Number: 4
Address in A1200: $d80011
Address on Limited Edition: Board Offset + port offset + $38
Modem control register
Number: 5
Address in A1200: $d80015
Address on Limited Edition: Board Offset + port offset + $3a
Line status register (read only)
Number: 6
Address in A1200: $d80019
Address on Limited Edition: Board Offset + port offset + $3c
Modem status register
Number: 7
Address in A1200: $d8001d
Address on Limited Edition: Board Offset + port offset + $3e
Scratch pad register
------
With an IRQ enabled, the Silversurfer will issue an IRQ6, no matter where
it is connected. There are no more registers than the chip registers. All
you need is eight addresses.
The Z4 zorro expansion for A1200 computers has four clock-ports. It
is advisable to support them, as many people have bought the Silversurfer
because of the compatibility to this extension:
Add $4000 to all clock-port registers to access a Silversurfer on
clock-port 1 of the Z4 board.
Add $8000 to all clock-port registers to access a Silversurfer on
clock-port 2 of the Z4 board.
Add $c000 to all clock-port registers to access a Silversurfer on
clock-port 3 of the Z4 board.
Check for presence of the Z4 board by checking mirrors of the scratch pad
register. If you write to the scratch pad register at $d8001d and also find
that value at $d8401d, there can be no Z4 board. DO CROSS-CHECKS by writing
the scratch pad register in $d8401d and reading it back on $d8001d, as there
can be trash in the scratch pad from the previous run of your (or other)
software. Writes should be done with different bit-patterns in order to
minimize the possiblity of false identification.
Silversurfer on other clock-ports:
The Buddha Flash also contains a clock-port. This port is located at even
addresses, so substract $d80001 from the clock-port values and add the board
offset plus the port offset. In other words, if the Buddha is located at
$ea0000, the eight registers are at:
$ea0e00
$ea0e04
$ea0e08
$ea0e0c
$ea0e10
$ea0e14
$ea0e18
$ea0e1c
Similar calculation with the X-Surf clock-ports. Mind that one of the
ports uses even addresses, and the other uses odd addresses. This has
been done in order to balance the load on the data lines a bit. While
implementing software for other ports, also look at the Inside_ISDN.txt
file for the port location on the ISDN Surfer Zorro board.
The UART is clocked at 7,372800 Mhz. The frequency may sound odd, but
it is perfect for generating the common baud rates. To operate properly,
the Baud rate generator uses a 16x clock rate, so if you want to set 38400
baud, the Baud rate generator must be programmed to genberate a 614400 clock.
This is done by calculating 7372800/614400=12. Write this value to the
Divisor Latch LSB, and a 0 to the Divisor Latch MSB, and you're done.
Solder-jumpers on the back of the silversurfer:
There are six unused pads on the back of the board. Four of them are
maent for pullup/pulldown resistors or noise reduction capacitors. This
relates to my experience with the non-working Hypercom 1 models, that could
have been debugged with 33pF capacitors on IOR and IOW (unfortunately,
somebody decided to use standard low-cost capacitors, so the bug still
exists - it will not if you use X7R capacitors in SMD style!). The chip
used on the Silversurfer does not need this kind of debugging, it has a
built-in input hysteresis, so noise is filtered on-chip. Just leave the
four pads on the Silversurfer unused, and focus on the other two, which
are more interesting: They are simple jumpers, either use a wire or a 0-ohm
resistor to close the jumpers.
Never close both jumpers at the same time!
location of the jumpers:
The diagram shows the silversurfer from the solder-side!
---------------------------
| clock-port |
| |
| |
| |
| |
------ -------
| |
| 1# #3 |
| |
| 2# #4 |
| |
| |
| # #|
| |
| # # # #|
| |
| # # |
| |
| |
| |
| |
| |
| |
| |
| |
|## |---
|## |---
|## |--- serial connector
|## |---
| |---
----------------------------
Only use pads with numbers, leave the other pads (marked with #) unused!!
Usually, the CS2 signal (pin 16) of the UART is pulled high with a resistor
that is located on the top of the silversurfer. Closing one of the jumpers
applies address line A5 to this pin, either inverted, or double-inverted
(that is, directly). As a result, one of the register banks will be disabled:
Connection 1-2 (R2) will disable the lower register bank
This means, that the UART chip is only located at addresses $d80021 and up
(Mirror on $d80001 and up is free, can be used for other hardware).
Connection 3-4 (R4) will disable the upper register bank
This means, that the UART chip is only located at addresses $d80001 and up
(Mirror on $d80021 and up is free, can be used for other hardware).
These solder-jumpers are also present on the limited edition of the
Silversurfer. Only use them if you are using the clock-port connector,
otherwise you will cause even more confusion with the registers of the
26-pin connector.
The other unused pads on the opposite side are meant for direct connection of
a DB9-male connector. This has never been used, and will only fit if you
use the Silversurfer on a Zorro board (or in a completely different
enviroment). The orientation of the connector is obvious: Four pins on the
solderside, five pins on the component side will speak for themselves.
If you have any comments or want to have a hardcopy of the California
Microdevices datasheet, send me an e-mail: jens@jschoenfeld.de
---EOF
This document is freely distributable as long as it is not changed, and one
of the sources www.jschoenfeld.com, www.jschoenfeld.de, www.siliconsonic.com
or www.ami.ga is mentioned.
last update:
august 31st, 2003: initial release
General
-------
RR-Net is a 10MBit networking card that is designed for the commodore C64,
for use on the Retro Replay freezer cartridge. It'll also work on the Amiga
with a clock-port, but it is not recommended: The card does not support IRQs,
and it hardly fits mechanically. If you need network for your Amiga, use the
X-Surf 2 board.
Memory map
----------
The memory map depends on the place where RR-Net is connected. Although
RR-Net is designed for the C64, here are also the offset addresses for the
Amiga. Check the corresponding hardware documentations for the carrier cards
to obtain the base addresses of the clockport.
RR-Net is based on the Cirrus logic CS8900a (Crystal LAN). The chip is used
in 8-bit mode, so the 8 registers of an NE2000 are spread over 16 registers
in an 8-bit system. The 8-bit mode of the chip does not support IRQs (see
Cirrus logic application note AN181).
Do not forget to switch on the accessory connector of the Retro Replay by
setting bit 0 in $de01. See Inside_Replay.txt for more information.
C64 register Amiga register read/write meaning
none $00/$04 read-only interrupt status queue
$de02/$de03 $08/$0c read/write PackatPage pointer
$de04/$de05 $10/$14 read/write PacketPage Data (Port 0)
$de06/$de07 $18/$1c read/write PacketPage Data (Port 1)
$de08/$de09 $20/$24 read/write Receive/Transmit Data (Port 0)
$de0a/$de0b $28/$2c read/write Receive/Transmit Data (Port 1)
$de0c/$de0d $30/$34 write-only TxCMD (Transmit Command)
$de0e/$de0f $38/$3c write-only TxLength (Transmit Length)
Although the Amiga makes the interrupt status queue registers available, it
does not have any effect. Even if you try to activate the chip's IRQ features,
it will not have any effect. The IRQ line of the chip is not wired on RR-Net
at all!
If you compare this register map to the register map in AN181, you might
notice that the first and the second half of the register set is swapped.
This has been done, because the accessory connector of the Retro Replay does
not provide the full range of registers available on the Amiga clockport. The
first two bytes are control registers of the freezer cartridge, and this
swapping moves the unnecessary register-pair (IRQ status queue) into the
"invisible" area of the cartridge.
Endianess
---------
Although the chip is used in 8-bit mode, you have to know the endianess,
because each register pair forms a one 16-bit register. Ethernet is
big-endian by default. The chip was designed as an ISA thing, so all
registers appear as little endian. In other words: The lowbyte comes first,
then the highbyte.
MAC address
-----------
RR-Net does not have an EEprom to store the MAC address, so it should be
stored somewhere else: The flash rom of Retro Replay, the disk of the
Contiki operating system by Adam Dunkels (http://dunkels.com/adam/contiki/),
or Kickflash OS4 for the Amiga. The Mac address is only needed when
transmitting packets, so it's OK if it's loaded from mass storage media when
loading/starting the driver. The Mac address is NOT needed when RR-Net is
just connected to other networking equipment. The LINK led might already be
on, but the MAC address is only needed when something is transmitted into the
network.
More literature
---------------
Cirrus Logic Application note AN181: "Using the Crystal CS8900A in 8-bit
mode" by James Ayres: http://www.cirrus.com/en/pubs/appNote/an181.pdf
Crystal LAN CS8900A Ethernet Controller Technical Reference manual AN83:
http://www.cirrus.com/en/pubs/appNote/An83-3.pdf
The product data sheet for the CS8900A also contains software information,
starting at chapter 4 (page 38):
http://www.cirrus.com/en/pubs/proDatasheet/cs8900a-4.pdf
Application note 194: "How to program the Hash filter in the CS8900A":
http://www.cirrus.com/en/pubs/appNote/an194-1.pdf
The FAQ about the chip: http://www.cirrus.com/en/pubs/appNote/an205-2.pdf
Fine print
----------
RR-Net is not designed, authorized or warranted to be suitable for use in
life-support devices or systems or other critical operations. Inclusion of
the product in such applications is understood to be fully at the
customer's risk.
** EOF
